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| GIM>Investigación>Publicaciones |
| PUBLICACIONES originadas dentro del proyecto: "FP7 288307 PHARAON..." ordenadas por fecha |
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| 2015 |
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Héctor Posadas, Pablo Peñil, Alejandro Nicolás, Eugenio Villar
"Automatic synthesis of communication and concurrency for exploring component-based system implementations considering UML channel semantics"
Journal of System Architecture, V.61, I.8, pp.341–360. 2015-09 |
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| 2014 |
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Héctor Posadas, Alejandro Nicolás, Pablo Peñil, Eugenio Villar, Florian Broekaert, Michel Bourdelles, Albert Cohen, Mihai T. Lazarescu, Luciano Lavagno, Andrei Terechko, Miguel Glassee, Manuel Prieto
"Improving the Design Flow for Parallel and Heterogeneous
Architectures running Real-Time applications: The PHARAON FP7 project"
Microprocessors and Microsystems,V.38, I.8, Part B, pp. 960–975. 2014-11 |
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Alejandro Nicolás, Pablo Peñil, Héctor Posadas, Eugenio Villar
"Automatic Deployment Of Component-Based Embedded Systems From UML/MARTE Models Using MCAPI"
XXIX Conference on Design of Circuits and Integrated Systems, DCIS 2014. 2014-11 |
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Héctor Posadas, Pablo Peñil, Alejandro Nicolás, Eugenio Villar
"Automatic synthesis of embedded SW for evaluating physical implementation alternatives from UML/MARTE models supporting memory space separation"
Microelectronics Journal, V.45, I.10, pp.1281–1291, doi: 10.1016/j.mejo.2013.11.003. 2014-10 |
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Alejandro Nicolás, Pablo Peñil, Héctor Posadas, Eugenio Villar
"Automatic Synthesis over multiple APIs from UML/MARTE Models for easy Platform Mapping and Reuse"
Proceedings of the EuroMicro DSD Conference, IEEE, 2014. 2014-08 |
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L. Lavagno (PoliTo), M. Lazarescu (PoliTo), Héctor Posadas, Alejandro Nicolás, Eugenio Villar
"Parallel and Heterogeneous Architectures for Real-Time Applications"
University Booth, DATE 14, Dresden. 2014-03 |
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Eugenio Villar, Alejandro Nicolás, Pablo Peñil, Héctor Posadas
"Modeling and SW Synthesis for Heterogeneous Embedded Systems in UML/MARTE"
Tutorial SD1: "High-Level Specifications to Cope With Design Complexity" in ASP-DAC 2014, Singapore
. 2014-01 |
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| 2013 |
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Alejandro Nicolás, Héctor Posadas, Pablo Peñil, Eugenio Villar
"Automatic Concurrency generation through Communication Data Splitting based on UML-MARTE Models"
XXVIII Conference on Design of Circuits and Integrated Systems, San Sebastian, Noviembre, 2013
. 2013-11 |
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R. Fernández, Héctor Posadas, Eugenio Villar
"Early performance evaluation of Multi-OS embedded platforms using native simulation"
Euromicro Conference on Digital System Design, DSD 2013, IEEE, doi: 10.1109/DSD.2013.131. 2013-09 |
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Héctor Posadas, Eugenio Villar, et al.
"EU FP7-288307 PHARAON project: Parallel and heterogeneous architecture for real-time applications"
Euromicro Conference on Digital System Design, DSD 2013, IEEE, doi: 10.1109/DSD.2013.47. 2013-09 |
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Pablo Peñil, Héctor Posadas, Alejandro Nicolás, Eugenio Villar, D. Calvo (TED)
"Code Synthesis of UML/MARTE models for physical platforms considering resource-specific codes"
IV Jornadas de Computación Empotrada, Sarteco 2013. 2013-09 |
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Héctor Posadas, Pablo Peñil, Alejandro Nicolás, Eugenio Villar
"System synthesis from UML/MARTE models: The PHARAON approach"
Electronic System Level Synthesis Conference, ESLsyn, 2013, IEEE. 2013-05 |
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| 2012 |
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Héctor Posadas, Pablo Peñil, Alejandro Nicolás, Eugenio Villar
"Automatic synthesis of Embedded SW Communications from UML/MARTE models supporting memory-space separation"
XXVII Conference on Design of Circuits and Integrated Systems, DCIS'12. 2012-11 |
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Héctor Posadas, Pablo Peñil, Alejandro Nicolás, Eugenio Villar
"UML/MARTE methodology for high-level system estimation and optimal synthesis"
MeCoES - Metamodeling and Code Generation for Embedded Systems, ESWeek 2012. 2012-10 |
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Pablo Peñil, Héctor Posadas, Alejandro Nicolás, Eugenio Villar
"Automatic synthesis from UML/MARTE models using channel semantics"
International Workshop on Model-Based Arquitecting and Construction of Embedded Systems, ACES-MB 2012, doi: 10.1145/2432631.2432640. 2012-09 |
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F. Colas-Bigey, A. Terechko, Héctor Posadas, Eugenio Villar, Pablo Peñil, F. Broekaert, C. Couvreur, M. Bourdelles, S. Li, L. Lavagno, A. Cohen
"Definition of tool interfaces and integrated design flow"
Deliverable D1.2 of the FP7 Pharaon Project. 2012-06 |
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Héctor Posadas, Eugenio Villar, Pablo Peñil, F. Broekaert, C. Chantal, L. Lavagno, A. Terechko, M. Bourdelles, S. Li
"System specification methodology"
Deliverable D1.3 of the FP7 Pharaon Project. 2012-06 |
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