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| GIM>Investigación>Publicaciones |
| PUBLICACIONES en las que participa: "Fernando Herrera" ordenadas por fecha |
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| 2017 |
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Fernando Herrera, J. Medina, Eugenio Villar
"Modeling Hardware/Software Embedded Systems with UML/MARTE: A Single-Source Design approach"
in Soonhoi Ha and Jürgen Teich (Eds): "Handbook of Hardware/Software Codesign", Springer. 2017-09 |
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K. Grüttner, R. Görgen, S. Schreiner, Fernando Herrera, Pablo Peñil, J. Medina, Eugenio Villar, et al.
"CONTREX: Design of embedded mixed-criticality CONTRol systems under consideration of EXtra-functional properties"
Microprocessors and Microsystems, V.51, pp. 39-55, doi=10.1016/j.micpro.2017.03.012. 2017-06 |
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F. Mallet, Eugenio Villar, Fernando Herrera
"MARTE for CPS and CPSoS"
in S. Nakajima, J.P. Talpin, M. Toyoshima and H. Yu (Eds.): "Cyber-Physical System Design from an Architecture Analysis Viewpoint: Communications of NII Shonan Meetings", Springer, pp.81-108, doi="10.1007/978-981-10-4436-6. 2017-05 |
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| 2016 |
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R. Gorgen, K. Gruttner, Fernando Herrera, Pablo Peñil, J. Medina, Eugenio Villar, G. Palermo, W. Fornaciari, C. Brandolese, D. Gadioli, et. al.
"CONTREX: Design of Embedded Mixed-Criticality CONTRol Systems under Consideration of EXtra-Functional Properties "
19th Euromicro Conference on Digital System Design, DSD 2016, IEEE. 2016-09 |
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Fernando Herrera, Eugenio Villar
"Fidelity of native-based performance models for Design Space Exploration"
MiFi Workshop in DATE 2016
in
http://www.date-conference.com/conference/workshop-w03. 2016-03 |
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Fernando Herrera, Eugenio Villar
"CONTREP: A single-source framework for UML-based
Modelling and Design of Mixed-Criticality Systems"
University Booth in DATE 2016. 2016-03 |
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Fernando Herrera
"UML/MARTE modelling for mixed-criticality systems"
Tutorial "CONTREX: Virtual Integration Testing for Mixed-Criticality Systems under Consideration of Power and Temperature Constraints" in HIPEAC 2016. 2016-01 |
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| 2015 |
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Fernando Herrera, Pablo Peñil, Eugenio Villar
"UML/MARTE Modelling for Design Space
Exploration of Mixed-Criticality Systems on top
of Time-Predictable HW/SW Platforms"
Jornadas de Computación Empotrada (JCE15). 2015-09 |
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Fernando Herrera, Pablo Peñil, Eugenio Villar
"Enhancing Analyzability and Time Predictability in UML/MARTE Component-based Application Models"
Forum on specification & Design Languages (FDL 2015). 2015-09 |
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Fernando Herrera, Pablo Peñil, Eugenio Villar
"A model-based, single-source approach to design-space exploration and synthesis of mixed-criticality systems"
18th International Workshop on Software and Compilers for Embedded Systems, SCoPES 2015, ACM. 2015-06 |
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Fernando Herrera, Ingo Sander, Kathrin Rosvall, Edoardo Paone, Gianluca Palermo
"An Efficient Joint Analytical and Simulation-based Design Space
Exploration Flow for Predictable Multi-Core Systems"
7th Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools. RAPIDO´15. 2015-01 |
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| 2014 |
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Héctor Posadas, Fernando Herrera, Eugenio Villar
"Using JIGSAW-type collaborative learning for integrating foreign students in embedded system engineering"
Special session on Education, in the Conference on Design of Circuits and Integrated Circuits (DCIS). 2014-11 |
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Fernando Herrera, Pablo Peñil, Héctor Posadas, Eugenio Villar
"Model-Driven Methodology for the Development of Multi-level Executable Environments"
J. Haase (Ed.): "Models, Methods and Tools for Complex Chip Design", Lecture Notes in Electrical Engineering, V.265, Springer. 2014-01 |
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Fernando Herrera, Héctor Posadas, Pablo Peñil, Eugenio Villar, F. Ferrero (GMV), R. Valencia (GMV), G. Palermo
"The COMPLEX methodology for UML/MARTE modeling and design-space exploration of embedded systems"
Journal of Systems Architecture, V.60, N.1, Elsevier, pp.55–78. 2014-01 |
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| 2013 |
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K. Grüttner, P.A. Hartmann, K. Hylla, S. Rosinger, W. Nebel, Fernando Herrera, Eugenio Villar, C. Brandolese, W. Fornaciari, G. Palermo, C. Ykman-Couvreur, D. Quaglia, F. Ferrero (GMV), R. Valencia (GMV)
"The COMPLEX reference framework for HW/SW co-design and power management supporting platform-based design-space exploration"
Microprocessors and Microsystems, V.37, N.8-C, Elsevier, pp.966-80. 2013-11 |
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Fernando Herrera, Héctor Posadas, Pablo Peñil, Eugenio Villar, Pablo Pedro Sánchez, Pablo González, F. Ferrero (GMV), R. Valencia (GMV)
"A MDD Methodology for the Specification and Performance Estimation of Embedded Systems"
Tutorial B: Advanced Techniques for Power-Aware System-Level Prototyping, DATE'13. 2013-03 |
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| 2012 |
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Fernando Herrera, Iñigo Ugarte, Eugenio Villar
"Towards automated implementation of adaptive systems from abstract SystemC specifications"
Design Automation of Embedded Systems, Springer. 2012-11 |
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Fernando Herrera, Héctor Posadas, Pablo Peñil, Eugenio Villar, F. Ferrero (GMV), R. Valencia (GMV)
"A MDD Methodology for Specification of Embedded Systems and Automatic Generation of Fast Configurable and Executable Performance Models"
ESWeek 2012 Compilation Proceedings, CoDes+ISSS’12, ACM. 2012-10 |
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Fernando Herrera, Héctor Posadas, Pablo Peñil, Eugenio Villar, F. Ferrero (GMV), R. Valencia (GMV)
"The CompleX Eclipse Framework for UML/MATE Specification and design Space Exploration of Embedded Systems"
Proceedings of the 2012 Conference on Design & Architectures for Signal & Image Processing, DASIP 2012, IEEE. 2012-10 |
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Fernando Herrera, Héctor Posadas, Eugenio Villar, Daniel Calvo
"Enhanced IP-XACT Platform Descriptions for Automatic Generation from UML/MARTE of Fast Performance Models for DSE"
15th Euromicro Conference on Digital System Design, DSD'2012. 2012-09 |
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K. Gruttner, P.A. Hartmann, K. Hylla, S. Rosinger, W. Nebel, Fernando Herrera, Eugenio Villar, C. Brandolese, W. Fornaciari, G. Palermo, C. Ykman-Couvreur, D. Quaglia, F. Ferrero, R. Valencia
"COMPLEX - COdesign and power Management in PLatform-based design space EXploration
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15th Euromicro Conference on Digital System Design, DSD'2012. 2012-09 |
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Fernando Herrera, Pablo Peñil, Eugenio Villar, F. Ferrero (GMV), R. Valencia (GMV)
"An Embedded System Modelling Methodology for Design Space Exploration
"
III Jornadas de Computación Empotrada, Sarteco 2012. 2012-09 |
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Fernando Herrera, Pablo Peñil, Héctor Posadas, Eugenio Villar
"A Model-Driven Methodology for the Development of SystemC Executable Environments
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Proceedings of the 2012 Forum on Specification and Design Languages, FDL'2012, IEEE. 2012-09 |
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Pablo Peñil, Fernando Herrera, Eugenio Villar
"Formal Support for Untimed MARTE-SystemC Interoperability"
T. Kazmierski & A. Morawiec (Eds.): "Systems Specification and Design Languages", Lecture Notes in Electrical Engineering, V.106, Springer. 2012-06 |
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Fernando Herrera, Pablo Peñil, Eugenio Villar, F. Ferrero (GMV), R. Valencia (GMV)
"The COMPLEX Eclipse framework for UML/MARTE Specification of Embedded Systems and automatic generation of executable models for Design-Space Exploration"
University Booth, DATE 12, Dresden. 2012-03 |
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Pablo Peñil, Fernando Herrera, Eugenio Villar
"Formal Foundations for the Generation of Heterogeneous Executable Specifications in SystemC from UML/MARTE Models"
Kiyofumi Tanaka: "Embedded Systems - Theory and Design Methodology", InTech, Croatia. 2012-02 |
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Fernando Herrera, Iñigo Ugarte
"Concurrent Specification of Embedded Systems: An Insight into the Flexibility vs Correctness trade-off
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Kiyofumi Tanaka: "Embedded Systems - Theory and Design Methodology", InTech, Croatia. 2012-02 |
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Elena Alaña, Francisco Ferrero, Ana Isabel Rodríguez, Raúl Valencia, Eric Conquet, Juan Antonio Puente, Juan Zamorano, Fernando Herrera, Roberto Varona
"Component-based technologies for HW/SW Co-Design"
Embedded Real Time Software and Systems-ERTS2. Toulouse. France. 2012-02 |
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| 2011 |
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Fernando Herrera, Pablo Peñil
"An Eclipse-based Framework for Modelling and Design Space
Exploration of Embedded Systems: The COMPLEX approach
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2nd Spanish Eclipse Embedded's Day. 2011-10 |
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Fernando Herrera, Eugenio Villar
"A Framework for the Generation from UML/MARTE Models of IP/XACT HW Platform Descriptions for Multi-Level Performance Estimation
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Proceedings of the Forum of Design and Specification Languages 2011 (FDL'2011). 2011-09 |
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Fernando Herrera, Eugenio Villar, Philipp Harmann
"SystemC Refinement of Abstract Adaptive Processes for Implementation into Dynamically Reconfigurable Hardware
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Proceedings of the Forum of Design and Specification Languages 2011 (FDL'2011). 2011-09 |
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Fernando Herrera, Pablo Peñil, Eugenio Villar, F. Ferrero (GMV), R. Valencia (GMV), L. Lavagno (PoliTo), D. Quaglia (EdaLab)
"SystemC Generation Tools from MARTE and Stateflow"
Deliverable D2.1.2 of the COMPLEX project. 2011-06 |
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Emmanuel Vaumorin (Magillem), Bart Vanthournout (Synopsys), Sara Bocchio (ST-I), Davide Quaglia (EdaLab), Fernando Herrera, Pablo Peñil, Eugenio Villar, Kai Hylla (OFFIS), Tiemo Fandrey (OFFIS)
"Preliminary report on virtual system generation"
Deliverable D2.5.1 of the COMPLEX project. 2011-06 |
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Carlo Brandolese (PoliMi), Gianluca Palermo (PoliMi), William Fornaciari (PoliMi), Fernando Herrera, Héctor Posadas, Eugenio Villar, Massimo Poncino (PoliTo), Chantal Ykman-Couvreur (IMEC)
"Preliminary report on design space exploration"
Deliverable 3.4.1 of COMPLEX project. 2011-06 |
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Pablo Peñil, Fernando Herrera, Eugenio Villar
"Towards SystemC Code Generation from UML/MARTE Concurrent System-Level Models "
W6: 2nd Workshop on Model Based Engineering for Embedded Systems Design, DATE 2011. 2011-03 |
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Fernando Herrera, Eugenio Villar
"Generation of Abstract IP/XACT Platform Descriptions from UML/MARTE for System-Level Performance Estimation
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W6: 2nd Workshop on Model Based Engineering for Embedded Systems Design, DATE 2011. 2011-03 |
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| 2010 |
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Francisco Ferrero (GMV), R. Valencia (GMV), Fernando Herrera, Eugenio Villar, L. Lavagno, D. Quaglia
"System specification methodology using MARTE and Stateflow
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Deliverable D2.1.1 of the COMPLEX project.. 2010-12 |
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Carlo Brandolese (PoliMi), Gianluca Palermo (PoliMi), William Fornaciari (PoliMi), Fernando Herrera, Eugenio Villar, Francisco Ferrero (GMV), Raúl Valencia (GMV), Bart Vanthournout (Synopsys)
"Preliminary report on Embedded Software Estimation and Model Generation
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Deliverable D2.2.1 of the COMPLEX project. 2010-12 |
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Kai Hylla (OFFIS), Saif A. Butt (CV), Fernando Herrera, Sara Real, Pablo González, Pablo Pedro Sánchez
"Preliminary report on Custom Hardware Estimation and Model Generation
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Deliverable D2.4.1 of the COMPLEX project. 2010-12 |
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Gianluca Palermo, Carlo Brandolese, Francisco Ferrero, Gunnar Schomaker, Claus Brunzema, Kim Gruettner, Kai Hylla, Bart Vanthournout, Davide Quaglia, Luciano Lavago, Massimo Poncino, Emanuel Vaumorin, Chantal Couvreur, Saif Ali Butt, Fernando Herrera
"Definition of application, stimuli and platform specification, and definition of tool interfaces"
Documento Entregable D1.2.1 del proyecto COMPLEX,
http://complex.offis.de
. 2010-10 |
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Pablo Peñil, Fernando Herrera, Eugenio Villar
"Formal Foundations for MARTE-SystemC Interoperability"
Forum on specification & Design Languages 2010, FDL'2010, IEEE. 2010-09 |
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Víctor Fernández, Fernando Herrera, Eugenio Villar
"Formal Support for Untimed SystemC specifications: Application to high-level synthesis"
Forum on specification & Design Languages 2010, FDL'2010, IEEE. 2010-09 |
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| 2009 |
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Fernando Herrera, Eugenio Villar
"Local Application of Simulation Directed for Exhaustive Coverage of Schedulings in SystemC Specifications"
Proceedings of the Forum on specification and Design Languages, FDL'09, IEEE, 2009. 2009-09 |
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Fernando Herrera
"Especificación Heterogénea y Generación Automática de Software para Sistemas Embebidos desde SystemC"
Universidad de Cantabria. 2009-02 |
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Sara Real, Fernando Herrera, Eugenio Villar
"Modelling of SW. Final library elements."
Deliverable D1.2b of the ANDRES project. 2009-01 |
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| 2008 |
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Fernando Herrera, Eugenio Villar, P. A. Hartmann
"Specification of HW/SW adaptive Embedded Systems in
SystemC"
Proceedings of the Forum on specification and Design Languages, FDL'08, IEEE, 2008. 2008-09 |
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F.Oppenheimer, K.Gruettner, A. Jantsch, F. Colas-Bigey, J. Haase, M. Martinez, Fernando Herrera, Eugenio Villar
"Intermediate Dissemination and Demonstration Plan"
Deliverable D4.1c of the ANDRES project. 2008-07 |
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Fernando Herrera, Eugenio Villar, C.Grimm, M.Damm, J.Haase
"Heterogeneous Specification with HetSC and SystemC-AMS. Widening the support of MoCs in SystemC
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E. Villar (Ed.): "Embedded Systems Specification and Design Languages", The CHDL Series V.10, Springer, pp-107-121. 2008-06 |
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J. Haase, P. A. Hartmann, Fernando Herrera
"Initial Version of Integrated Framework."
Deliverable D1.6a of the ANDRES project. 2008-06 |
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K.Gruettner, A. Herrholz, P. A. Hartmann, Fernando Herrera, Eugenio Villar
"Interface Synthesis Concept"
Deliverable D2.3a of the ANDRES project. 2008-06 |
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J. Haase, M. Damm, C. Grimm, Fernando Herrera, Eugenio Villar
"Bridging MoCs in SystemC Specifications of Heterogeneous Systems"
EURASIP Journal on Embedded Systems, Special Issue "C-Based Design of Heterogeneous Embedded Systems", Volume 2008 (2008), Article ID 738136, 16 pages. 2008-05 |
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| 2007 |
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J. Haase, M. Damm, C. Grimm, Fernando Herrera, Eugenio Villar
"Using Converter Channels within a Top-Down Design Flow in SystemC"
The 15th Austrian Workhop on Microelectronics, Graz, Austria. 2007-10 |
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Fernando Herrera, Eugenio Villar, C. Grimm, M. Damm, J. Haase
"A general approach to the interoperability of HetSC and SystemC-AMS"
Proceedings of the Forum on Design Languages 2007, FDL'07. Barcelona. 2007-09 |
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Fernando Herrera, Eugenio Villar
"A Framework for Heterogeneous Specification and Design of Electronic Embedded Systems in SystemC"
ACM Transactions on Design Automation of Electronic Systems, Special Issue on Demonstrable Software Systems and Hardware Platforms, V.12, Issue 3, N.22. 2007-08 |
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A.Herrholz, F. Oppenheimer, P.A.Hartmann, A.Schallenberg, W. Nebel, C.Grimm, M.Damm, J.Haase, F.Brame, Fernando Herrera, Eugenio Villar, I.Sander, A.Jantsch, A.-M.Foulliart, M.Martínez
"The ANDRES project: Analysis and Design of Run-time REconfigurable, heterogeneous Systems"
17th International Conference on Field Programmable Logic and Applications. Amsterdam. 2007-08 |
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Fernando Herrera, Eugenio Villar
"Modeling of Software. Initial Library elements"
Deliverable D1.2a of the IST 5-033511 ANDRES Project. 2007-06 |
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A. Herrholz, F. Oppenheimer, A. Schallenberg, W. Nebel, C. Grimm, M. Damm, Fernando Herrera, Eugenio Villar, A-M. Fouilliart, M. Martínez
"ANDRES- ANalysis and Design of run-time REconfigurable, heterogeneous Systems"
Workshop on "Adaptive Heterogeneous Systems-On-Chip and European Dimensions" in the Design Automation and Test in Europe 2007, DATE'07. 2007-04 |
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| 2006 |
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Eugenio Villar, Fernando Herrera
"SystemC as an Heterogeneous System Specification Language"
ARTIST2 Workshop on Models of Computation and Communication (MoCC'06), ETH, Zurich. 2006-11 |
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Fernando Herrera, Eugenio Villar, Cristoph Grimm (TUV), Ingo Sanders (KTH), Axel Jantsch (KTH)
"Methodology for Specification of Adaptivity"
Deliverable D1.1a of the IST 5-033511 ANDRES Project. 2006-11 |
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Fernando Herrera, Eugenio Villar
"Extension of the SystemC kernel for Simulation Coverage Improvement of
System-Level Concurrent Specifications"
Proceedings of the Forum on Design Languages (FDL’06), Darmstadt, ECSI. 2006-09 |
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Fernando Herrera, Eugenio Villar
"A Framework for Embedded System Specification under Different Models of Computation in SystemC"
Proc. of DAC'06, ACM. 2006-07 |
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Fernando Herrera, Eugenio Villar
"Mixing Synchronous Reactive and Untimed MoCs in SystemC"
"Applications of Specification and Design Languages for SoCs", A. Vachoux (Ed.), CHDL Series, Springer. 2006-07 |
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| 2005 |
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Fernando Herrera, Pablo Pedro Sánchez, Eugenio Villar
"Heterogeneous system-level specification in SystemC"
"Advances in Design and Specification Languages for SoC", P. Boulet (Ed.), CHDL Series, Springer. 2005-10 |
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Fernando Herrera, Eugenio Villar
"Mixing synchronous reactive and untimed models of computation in SystemC"
Proceedings of the Forum on Design Languages (FDL’05), Lausanne, ECSI. 2005-09 |
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| 2004 |
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Héctor Posadas, Fernando Herrera, Víctor Fernández, Pablo Pedro Sánchez, Eugenio Villar, F. Blasco
"Single Source Design Environment for Embedded Systems Based on SystemC"
Design Automation for Embedded Systems, V.9, N.4, Springer, pp.293-312. 2004-12 |
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Fernando Herrera, Pablo Pedro Sánchez, Eugenio Villar
"Heterogeneous system-level specification in SystemC"
Proceedings of the Forum on Design Languages (FDL’04), Lille, ECSI. 2004-09 |
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Fernando Herrera, Pablo Pedro Sánchez, Eugenio Villar
"Modeling and design of CSP, KPN and SR systems in SystemC"
"Languages for System Specification", C. Grimm (Ed.), CHDL Series, Kluwer Academic Publisher. 2004-06 |
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Héctor Posadas, Fernando Herrera, Pablo Pedro Sánchez, Eugenio Villar, F. Blasco
"System-Level Performance Analysis in SystemC"
proc. of DATE'04, IEEE CS Press. 2004-02 |
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| 2003 |
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Fernando Herrera, Pablo Pedro Sánchez, Eugenio Villar
"Modeling and design of CSP, KPN and SR systems in SystemC"
Proceedings of the Forum on Design Languages FDL'03, Frankfurt, ECSI. 2003-09 |
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Fernando Herrera, Héctor Posadas, Pablo Pedro Sánchez, Eugenio Villar
"Systematic Embedded Software Generation from SystemC"
proc. of DATE'03, IEEE CS Press. 2003-02 |
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Fernando Herrera, Víctor Fernández, Pablo Pedro Sánchez, Eugenio Villar
"Embedded Software Generation from SystemC for Platform Based Design"
"SystemC Methodologies and Applications", Kluwer Academic Publishers. 2003-01 |
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Fernando Herrera, Héctor Posadas, Pablo Pedro Sánchez, Eugenio Villar
"Systematic Embedded software generation from SystemC"
"Embedded Software for SoC", Kluwer Academic Publishers. 2003-01 |
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| 2002 |
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Héctor Posadas, Fernando Herrera, Pablo Pedro Sánchez, Eugenio Villar
"Library for microprocessor core analysis"
UC-T1.3-Q4/02 Deliverable of the Medea+ A511 TOOLIP Project. 2002-12 |
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Francisco Blasco, Eugenio Villar, Fernando Herrera
"System-Level Dynamic Estimation of Time Performance for Codesign based on SystemC and HW/SW platform"
XVII Conference on Design of Circuits and Integrated Systems DCIS'02, Santander. 2002-11 |
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Fernando Herrera, Héctor Posadas, Eugenio Villar
"Documento de requisitos técnicos de la biblioteca de perfilado"
UC/ToolIP/IR/03 Internal Report of the Medea+ A511 TOOLIP Project. 2002-11 |
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Fernando Herrera, Pablo Pedro Sánchez, Eugenio Villar
"HW/SW interface implementation from SystemC for platform-based design"
Forum on Design Languages FDL'02, ECSI. 2002-10 |
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Fernando Herrera, Pablo Pedro Sánchez, Eugenio Villar
"Comparative study for the selection of the processor core for SystemC specification"
UC/ToolIP/IR/01 Internal Report of the Medea+ A511 TOOLIP Project. 2002-06 |
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Fernando Herrera, Pablo Pedro Sánchez, Eugenio Villar
"First draft of the library for microprocessor core analysis"
UC/ToolIP/IR/02 Internal Report of the Medea+ A511 TOOLIP Project. 2002-06 |
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Víctor Fernández, Fernando Herrera, Pablo Pedro Sánchez, Eugenio Villar
"Conclusiones: Metodología industrial de diseño de sistemas embebidos HW/SW"
Documento Entregable DF del proyecto FEDER 1FD97-0791. 2002-02 |
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| 2001 |
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Víctor Fernández, Eugenio Villar, Fernando Herrera
"System-Level Specification in SystemC of a Residential Gateway"
16th Design of Circuits and Integrated Systems Conference, DCIS 2001. Oporto (Portugal). 2001-11 |
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Fernando Herrera, C. Camargo, Eugenio Villar
"Embedded system design methodology based on SystemC"
Proc. of the Forum on Design Languages FDL01, Lyon, ECSI. 2001-09 |
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Fernando Herrera, Víctor Fernández
"Introduction to SystemC"
"Design of HW/SW Embedded Systems". (Ed. E. Villar), Servicio de Publicaciones de la Universidad de Cantabria. 2001-07 |
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Víctor Fernández, Fernando Herrera, Eugenio Villar
"Especificación ejecutable del demostrador industrial"
Documento Entregable R2-C2 del proyecto FEDER 1FD97-0791. 2001-04 |
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| 2000 |
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Fernando Herrera, Víctor Fernández, R. Rodríguez, Pablo Pedro Sánchez, Eugenio Villar
"Especificación del demostrador industrial"
Documento Entregable R2-C1 del proyecto FEDER 1FD97-0791. 2000-10 |
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Fernando Herrera, R. Rodríguez, Víctor Fernández, Eugenio Villar
"Desarrollo de Metodologías Industriales de Diseño de Sistemas Embebidos HW/SW"
I Seminario del Programa Nacional de Tecnologías de la Información y las Comunicaciones (TEDEA 2000). Almagro (Ciudad Real). 2000-09 |
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| 1999 |
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Fernando Herrera, C. Sánz, Iñigo Ugarte, Eugenio Villar
"Specification Components: Reusability at the HW/SW system specification level"
proc. of the VHDL International Users Forum, IEEE CS. 1999-10 |
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